Line data Source code
1 : /**************************************************************************
2 : * Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *
3 : * *
4 : * Author: The ALICE Off-line Project. *
5 : * Contributors are mentioned in the code where appropriate. *
6 : * *
7 : * Permission to use, copy, modify and distribute this software and its *
8 : * documentation strictly for non-commercial purposes is hereby granted *
9 : * without fee, provided that the above copyright notice appears in all *
10 : * copies and that both the copyright notice and this permission notice *
11 : * appear in the supporting documentation. The authors make no claims *
12 : * about the suitability of this software for any purpose. It is *
13 : * provided "as is" without express or implied warranty. *
14 : **************************************************************************/
15 :
16 : //
17 : // Class AliADLogicalSignal
18 : // ---------------------------
19 : // Describes a logical signal in the electronics.
20 : // Use it to generate observation windows
21 : // which are used by AliADTriggerSimulator class
22 : //
23 : #include <iostream>
24 : #include <bitset>
25 :
26 : #include "AliLog.h"
27 : #include "AliADLogicalSignal.h"
28 :
29 16 : ClassImp(AliADLogicalSignal)
30 :
31 : //_____________________________________________________________________________
32 0 : AliADLogicalSignal::AliADLogicalSignal() : TObject(), fStart(0.), fStop(0.)
33 0 : {
34 : // Default constructor
35 0 : }
36 : //_____________________________________________________________________________
37 0 : AliADLogicalSignal::AliADLogicalSignal(UShort_t profilClock, UInt_t delay, UInt_t latch, UInt_t reset) : TObject(), fStart(0.), fStop(0.)
38 0 : {
39 : /*/
40 : std::cout << "P " << std::bitset<5>(profilClock)<< std::endl;
41 : std::cout << "L " << std::bitset<5>(latch)<< std::endl;
42 : std::cout << "R " << std::bitset<5>(reset)<< std::endl;
43 : std::cout << "Delay " <<delay<< std::endl;
44 : /*/
45 :
46 : // Constructor using the profilClock and delay parameters comming from the FEE
47 0 : Bool_t fClock[11];
48 0 : Int_t fTimes[11];
49 : Bool_t risingFound = kFALSE;
50 :
51 0 : for(Int_t i=0; i<5; i++) {
52 0 : fClock[i+1] = (profilClock >> 4-i) & 0x1;
53 0 : fClock[i+6] = (profilClock >> 4-i) & 0x1;
54 : }
55 0 : fClock[0] = (profilClock >> 0) & 0x1;
56 :
57 0 : if(reset>latch) for(Int_t i=0; i<11; i++) fTimes[i] = -5+5*i;
58 0 : if(reset<latch) for(Int_t i=0; i<11; i++) fTimes[i] = -30+5*i;
59 :
60 : /*/
61 : for(Int_t i=0; i<10; i++)std::cout<<fTimes[i]<<" ";
62 : std::cout<<std::endl;
63 : for(Int_t i=0; i<10; i++)std::cout<<fClock[i]<<" ";
64 : std::cout<<std::endl;
65 : /*/
66 :
67 0 : for(Int_t i=1; i<11; i++){
68 0 : if(!risingFound && !fClock[i-1] && fClock[i]){
69 : risingFound = kTRUE;
70 0 : fStart = fTimes[i];
71 0 : continue;
72 : }
73 0 : else if(risingFound && fClock[i-1] && !fClock[i]) {
74 0 : fStop = fTimes[i];
75 0 : break;
76 : }
77 : }
78 :
79 0 : fStart += delay*1e-2; // Add 10 ps par register unit
80 0 : fStop += delay*1e-2;
81 0 : }
82 : //_____________________________________________________________________________
83 : AliADLogicalSignal::AliADLogicalSignal(const AliADLogicalSignal &signal) :
84 0 : TObject(), fStart(signal.fStart),
85 0 : fStop(signal.fStop)
86 0 : {
87 : // Copy constructor
88 0 : }
89 :
90 : //_____________________________________________________________________________
91 0 : AliADLogicalSignal::~AliADLogicalSignal(){
92 : // Destructor
93 0 : }
94 :
95 : //_____________________________________________________________________________
96 : AliADLogicalSignal& AliADLogicalSignal::operator =
97 : (const AliADLogicalSignal& signal)
98 : {
99 : // Operator =
100 0 : if(&signal == this) return *this;
101 0 : fStart = signal.fStart;
102 0 : fStop = signal.fStop;
103 0 : return *this;
104 0 : }
105 :
106 : //_____________________________________________________________________________
107 : AliADLogicalSignal AliADLogicalSignal::operator|(const AliADLogicalSignal& signal) const
108 : {
109 : // Perform the Logical OR of two signals: C = A or B
110 0 : if((fStart>signal.fStop) || (signal.fStart>fStop))
111 0 : AliError(Form("Both signal do not superpose in time.\n Start(A) = %f Stop(A) = %f\n Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));
112 :
113 0 : AliADLogicalSignal result;
114 0 : if(fStart<signal.fStart) result.fStart = fStart;
115 0 : else result.fStart = signal.fStart;
116 :
117 0 : if(fStop>signal.fStop) result.fStop = fStop;
118 0 : else result.fStop = signal.fStop;
119 :
120 : return result;
121 0 : }
122 : //_____________________________________________________________________________
123 : AliADLogicalSignal AliADLogicalSignal::operator&(const AliADLogicalSignal& signal) const
124 : {
125 : // Perform the Logical AND of two signals: C = A and B
126 0 : if((fStart>signal.fStop) || (signal.fStart>fStop))
127 0 : AliError(Form("Both signal do not superpose in time.\n Start(A) = %f Stop(A) = %f\n Start(B) = %f Stop(B) = %f",fStart, fStop, signal.fStart,signal.fStop));
128 :
129 0 : AliADLogicalSignal result;
130 0 : if(fStart>signal.fStart) result.fStart = fStart;
131 0 : else result.fStart = signal.fStart;
132 :
133 0 : if(fStop<signal.fStop) result.fStop = fStop;
134 0 : else result.fStop = signal.fStop;
135 :
136 : return result;
137 0 : }
138 :
139 : //_____________________________________________________________________________
140 : Bool_t AliADLogicalSignal::IsInCoincidence(Float_t time) const
141 : {
142 : // Check if a signal arriving at the time "time" is in coincidence with the logical signal
143 : Bool_t result = kFALSE;
144 0 : if((time>fStart) && (time<fStop)) result = kTRUE;
145 0 : return result;
146 : }
147 :
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