Line data Source code
1 : /**************************************************************************
2 : * Copyright(c) 1998-1999, ALICE Experiment at CERN, All rights reserved. *
3 : * *
4 : * Author: The ALICE Off-line Project. *
5 : * Contributors are mentioned in the code where appropriate. *
6 : * *
7 : * Permission to use, copy, modify and distribute this software and its *
8 : * documentation strictly for non-commercial purposes is hereby granted *
9 : * without fee, provided that the above copyright notice appears in all *
10 : * copies and that both the copyright notice and this permission notice *
11 : * appear in the supporting documentation. The authors make no claims *
12 : * about the suitability of this software for any purpose. It is *
13 : * provided "as is" without express or implied warranty. *
14 : **************************************************************************/
15 :
16 : ////////////////////////////////////////////////////////////////////////////
17 : // //
18 : // TRAP config //
19 : // //
20 : // Author: J. Klein (Jochen.Klein@cern.ch) //
21 : // //
22 : ////////////////////////////////////////////////////////////////////////////
23 :
24 : #include "AliLog.h"
25 :
26 : #include "AliTRDgeometry.h"
27 : #include "AliTRDfeeParam.h"
28 : #include "AliTRDtrapConfig.h"
29 :
30 : #include <fstream>
31 : #include <iostream>
32 : #include <iomanip>
33 :
34 : const Int_t AliTRDtrapConfig::AliTRDtrapValue::fgkSize[] = {
35 : 0,
36 : 1,
37 : 540,
38 : 1080,
39 : 8*18*540,
40 : 4,
41 : 6,
42 : 8*18*30
43 : };
44 : Bool_t AliTRDtrapConfig::fgRegAddressMapInitialized = kFALSE;
45 : AliTRDtrapConfig::TrapReg_t AliTRDtrapConfig::fgRegAddressMap[] = { };
46 : const Int_t AliTRDtrapConfig::fgkRegisterAddressBlockStart[] = { 0x0a00, 0x3000, 0xd000 };
47 : const Int_t AliTRDtrapConfig::fgkRegisterAddressBlockSize[] = { 0x0400, 0x0200, 0x0004 };
48 :
49 177998 : AliTRDtrapConfig::AliTRDtrapConfig(const TString &name, const TString &title) :
50 61 : TNamed(name, title)
51 305 : {
52 : // default constructor
53 :
54 : // initialize and reset the TRAP registers
55 61 : InitRegs();
56 61 : ResetRegs();
57 :
58 125050 : for (Int_t iWord = 0; iWord < fgkDmemWords; ++iWord) {
59 62464 : fDmem[iWord].SetAddress(iWord + fgkDmemStartAddress);
60 : }
61 :
62 : // initialize the map from address to register
63 61 : if (!fgRegAddressMapInitialized) {
64 2610 : for (Int_t iReg = 0; iReg < kLastReg; iReg++) {
65 1302 : Int_t addr = fRegisterValue[iReg].GetAddr();
66 1302 : if (addr < fgkRegisterAddressBlockStart[0]) {
67 0 : AliError(Form("Register address 0x%04x not handled in register map", addr));
68 : }
69 1302 : else if (addr < fgkRegisterAddressBlockStart[0] + fgkRegisterAddressBlockSize[0]) {
70 363 : fgRegAddressMap[addr - fgkRegisterAddressBlockStart[0]] = (TrapReg_t) iReg;
71 363 : }
72 939 : else if (addr < fgkRegisterAddressBlockStart[1]) {
73 0 : AliError(Form("Register address 0x%04x not handled in register map", addr));
74 : }
75 939 : else if (addr < fgkRegisterAddressBlockStart[1] + fgkRegisterAddressBlockSize[1]) {
76 927 : fgRegAddressMap[addr - fgkRegisterAddressBlockStart[1] + fgkRegisterAddressBlockSize[0]] = (TrapReg_t) iReg;
77 927 : }
78 12 : else if (addr < fgkRegisterAddressBlockStart[2]) {
79 0 : AliError(Form("Register address 0x%04x not handled in register map", addr));
80 : }
81 12 : else if (addr < fgkRegisterAddressBlockStart[2] + fgkRegisterAddressBlockSize[2]) {
82 12 : Int_t ind = addr - fgkRegisterAddressBlockStart[2] + fgkRegisterAddressBlockSize[1] + fgkRegisterAddressBlockSize[0];
83 12 : fgRegAddressMap[ind] = (TrapReg_t) iReg;
84 12 : }
85 : else {
86 0 : AliError(Form("Register address 0x%04x not handled in register map", addr));
87 : }
88 : }
89 3 : fgRegAddressMapInitialized = kTRUE;
90 3 : }
91 122 : }
92 :
93 :
94 : AliTRDtrapConfig::~AliTRDtrapConfig()
95 4 : {
96 : // destructor
97 1462 : }
98 :
99 :
100 : void AliTRDtrapConfig::InitRegs()
101 : {
102 : // initialize all TRAP registers
103 :
104 : // Name Address Nbits Reset Value
105 122 : fRegisterValue[kSML0] .Init("SML0", 0x0A00, 15, 0x4050 ); // Global state machine
106 61 : fRegisterValue[kSML1] .Init("SML1", 0x0A01, 15, 0x4200 );
107 61 : fRegisterValue[kSML2] .Init("SML2", 0x0A02, 15, 0x4384 );
108 61 : fRegisterValue[kSMMODE] .Init("SMMODE", 0x0A03, 16, 0xF0E2 );
109 61 : fRegisterValue[kSMCMD] .Init("SMCMD", 0x0A04, 16, 0x0000 );
110 61 : fRegisterValue[kNITM0] .Init("NITM0", 0x0A08, 14, 0x3FFF );
111 61 : fRegisterValue[kNITM1] .Init("NITM1", 0x0A09, 14, 0x3FFF );
112 61 : fRegisterValue[kNITM2] .Init("NITM2", 0x0A0A, 14, 0x3FFF );
113 61 : fRegisterValue[kNIP4D] .Init("NIP4D", 0x0A0B, 7, 0x7F );
114 61 : fRegisterValue[kCPU0CLK] .Init("CPU0CLK", 0x0A20, 5, 0x07 );
115 61 : fRegisterValue[kCPU1CLK] .Init("CPU1CLK", 0x0A22, 5, 0x07 );
116 61 : fRegisterValue[kCPU2CLK] .Init("CPU2CLK", 0x0A24, 5, 0x07 );
117 61 : fRegisterValue[kCPU3CLK] .Init("CPU3CLK", 0x0A26, 5, 0x07 );
118 61 : fRegisterValue[kNICLK] .Init("NICLK", 0x0A28, 5, 0x07 );
119 61 : fRegisterValue[kFILCLK] .Init("FILCLK", 0x0A2A, 5, 0x07 );
120 61 : fRegisterValue[kPRECLK] .Init("PRECLK", 0x0A2C, 5, 0x07 );
121 61 : fRegisterValue[kADCEN] .Init("ADCEN", 0x0A2E, 5, 0x07 );
122 61 : fRegisterValue[kNIODE] .Init("NIODE", 0x0A30, 5, 0x07 );
123 61 : fRegisterValue[kNIOCE] .Init("NIOCE", 0x0A32, 6, 0x21 ); // bit 5 is status bit (read-only)!
124 61 : fRegisterValue[kNIIDE] .Init("NIIDE", 0x0A34, 5, 0x07 );
125 61 : fRegisterValue[kNIICE] .Init("NIICE", 0x0A36, 5, 0x07 );
126 61 : fRegisterValue[kARBTIM] .Init("ARBTIM", 0x0A3F, 4, 0x0 ); // Arbiter
127 61 : fRegisterValue[kIA0IRQ0] .Init("IA0IRQ0", 0x0B00, 12, 0x000 ); // IVT of CPU0
128 61 : fRegisterValue[kIA0IRQ1] .Init("IA0IRQ1", 0x0B01, 12, 0x000 );
129 61 : fRegisterValue[kIA0IRQ2] .Init("IA0IRQ2", 0x0B02, 12, 0x000 );
130 61 : fRegisterValue[kIA0IRQ3] .Init("IA0IRQ3", 0x0B03, 12, 0x000 );
131 61 : fRegisterValue[kIA0IRQ4] .Init("IA0IRQ4", 0x0B04, 12, 0x000 );
132 61 : fRegisterValue[kIA0IRQ5] .Init("IA0IRQ5", 0x0B05, 12, 0x000 );
133 61 : fRegisterValue[kIA0IRQ6] .Init("IA0IRQ6", 0x0B06, 12, 0x000 );
134 61 : fRegisterValue[kIA0IRQ7] .Init("IA0IRQ7", 0x0B07, 12, 0x000 );
135 61 : fRegisterValue[kIA0IRQ8] .Init("IA0IRQ8", 0x0B08, 12, 0x000 );
136 61 : fRegisterValue[kIA0IRQ9] .Init("IA0IRQ9", 0x0B09, 12, 0x000 );
137 61 : fRegisterValue[kIA0IRQA] .Init("IA0IRQA", 0x0B0A, 12, 0x000 );
138 61 : fRegisterValue[kIA0IRQB] .Init("IA0IRQB", 0x0B0B, 12, 0x000 );
139 61 : fRegisterValue[kIA0IRQC] .Init("IA0IRQC", 0x0B0C, 12, 0x000 );
140 61 : fRegisterValue[kIRQSW0] .Init("IRQSW0", 0x0B0D, 13, 0x1FFF );
141 61 : fRegisterValue[kIRQHW0] .Init("IRQHW0", 0x0B0E, 13, 0x0000 );
142 61 : fRegisterValue[kIRQHL0] .Init("IRQHL0", 0x0B0F, 13, 0x0000 );
143 61 : fRegisterValue[kIA1IRQ0] .Init("IA1IRQ0", 0x0B20, 12, 0x000 ); // IVT of CPU1
144 61 : fRegisterValue[kIA1IRQ1] .Init("IA1IRQ1", 0x0B21, 12, 0x000 );
145 61 : fRegisterValue[kIA1IRQ2] .Init("IA1IRQ2", 0x0B22, 12, 0x000 );
146 61 : fRegisterValue[kIA1IRQ3] .Init("IA1IRQ3", 0x0B23, 12, 0x000 );
147 61 : fRegisterValue[kIA1IRQ4] .Init("IA1IRQ4", 0x0B24, 12, 0x000 );
148 61 : fRegisterValue[kIA1IRQ5] .Init("IA1IRQ5", 0x0B25, 12, 0x000 );
149 61 : fRegisterValue[kIA1IRQ6] .Init("IA1IRQ6", 0x0B26, 12, 0x000 );
150 61 : fRegisterValue[kIA1IRQ7] .Init("IA1IRQ7", 0x0B27, 12, 0x000 );
151 61 : fRegisterValue[kIA1IRQ8] .Init("IA1IRQ8", 0x0B28, 12, 0x000 );
152 61 : fRegisterValue[kIA1IRQ9] .Init("IA1IRQ9", 0x0B29, 12, 0x000 );
153 61 : fRegisterValue[kIA1IRQA] .Init("IA1IRQA", 0x0B2A, 12, 0x000 );
154 61 : fRegisterValue[kIA1IRQB] .Init("IA1IRQB", 0x0B2B, 12, 0x000 );
155 61 : fRegisterValue[kIA1IRQC] .Init("IA1IRQC", 0x0B2C, 12, 0x000 );
156 61 : fRegisterValue[kIRQSW1] .Init("IRQSW1", 0x0B2D, 13, 0x1FFF );
157 61 : fRegisterValue[kIRQHW1] .Init("IRQHW1", 0x0B2E, 13, 0x0000 );
158 61 : fRegisterValue[kIRQHL1] .Init("IRQHL1", 0x0B2F, 13, 0x0000 );
159 61 : fRegisterValue[kIA2IRQ0] .Init("IA2IRQ0", 0x0B40, 12, 0x000 ); // IVT of CPU2
160 61 : fRegisterValue[kIA2IRQ1] .Init("IA2IRQ1", 0x0B41, 12, 0x000 );
161 61 : fRegisterValue[kIA2IRQ2] .Init("IA2IRQ2", 0x0B42, 12, 0x000 );
162 61 : fRegisterValue[kIA2IRQ3] .Init("IA2IRQ3", 0x0B43, 12, 0x000 );
163 61 : fRegisterValue[kIA2IRQ4] .Init("IA2IRQ4", 0x0B44, 12, 0x000 );
164 61 : fRegisterValue[kIA2IRQ5] .Init("IA2IRQ5", 0x0B45, 12, 0x000 );
165 61 : fRegisterValue[kIA2IRQ6] .Init("IA2IRQ6", 0x0B46, 12, 0x000 );
166 61 : fRegisterValue[kIA2IRQ7] .Init("IA2IRQ7", 0x0B47, 12, 0x000 );
167 61 : fRegisterValue[kIA2IRQ8] .Init("IA2IRQ8", 0x0B48, 12, 0x000 );
168 61 : fRegisterValue[kIA2IRQ9] .Init("IA2IRQ9", 0x0B49, 12, 0x000 );
169 61 : fRegisterValue[kIA2IRQA] .Init("IA2IRQA", 0x0B4A, 12, 0x000 );
170 61 : fRegisterValue[kIA2IRQB] .Init("IA2IRQB", 0x0B4B, 12, 0x000 );
171 61 : fRegisterValue[kIA2IRQC] .Init("IA2IRQC", 0x0B4C, 12, 0x000 );
172 61 : fRegisterValue[kIRQSW2] .Init("IRQSW2", 0x0B4D, 13, 0x1FFF );
173 61 : fRegisterValue[kIRQHW2] .Init("IRQHW2", 0x0B4E, 13, 0x0000 );
174 61 : fRegisterValue[kIRQHL2] .Init("IRQHL2", 0x0B4F, 13, 0x0000 );
175 61 : fRegisterValue[kIA3IRQ0] .Init("IA3IRQ0", 0x0B60, 12, 0x000 ); // IVT of CPU3
176 61 : fRegisterValue[kIA3IRQ1] .Init("IA3IRQ1", 0x0B61, 12, 0x000 );
177 61 : fRegisterValue[kIA3IRQ2] .Init("IA3IRQ2", 0x0B62, 12, 0x000 );
178 61 : fRegisterValue[kIA3IRQ3] .Init("IA3IRQ3", 0x0B63, 12, 0x000 );
179 61 : fRegisterValue[kIA3IRQ4] .Init("IA3IRQ4", 0x0B64, 12, 0x000 );
180 61 : fRegisterValue[kIA3IRQ5] .Init("IA3IRQ5", 0x0B65, 12, 0x000 );
181 61 : fRegisterValue[kIA3IRQ6] .Init("IA3IRQ6", 0x0B66, 12, 0x000 );
182 61 : fRegisterValue[kIA3IRQ7] .Init("IA3IRQ7", 0x0B67, 12, 0x000 );
183 61 : fRegisterValue[kIA3IRQ8] .Init("IA3IRQ8", 0x0B68, 12, 0x000 );
184 61 : fRegisterValue[kIA3IRQ9] .Init("IA3IRQ9", 0x0B69, 12, 0x000 );
185 61 : fRegisterValue[kIA3IRQA] .Init("IA3IRQA", 0x0B6A, 12, 0x000 );
186 61 : fRegisterValue[kIA3IRQB] .Init("IA3IRQB", 0x0B6B, 12, 0x000 );
187 61 : fRegisterValue[kIA3IRQC] .Init("IA3IRQC", 0x0B6C, 12, 0x000 );
188 61 : fRegisterValue[kIRQSW3] .Init("IRQSW3", 0x0B6D, 13, 0x1FFF );
189 61 : fRegisterValue[kIRQHW3] .Init("IRQHW3", 0x0B6E, 13, 0x0000 );
190 61 : fRegisterValue[kIRQHL3] .Init("IRQHL3", 0x0B6F, 13, 0x0000 );
191 61 : fRegisterValue[kCTGDINI] .Init("CTGDINI", 0x0B80, 32, 0x00000000 ); // Global Counter/Timer
192 61 : fRegisterValue[kCTGCTRL] .Init("CTGCTRL", 0x0B81, 12, 0xE3F );
193 61 : fRegisterValue[kC08CPU0] .Init("C08CPU0", 0x0C00, 32, 0x00000000 ); // CPU constants
194 61 : fRegisterValue[kC09CPU0] .Init("C09CPU0", 0x0C01, 32, 0x00000000 );
195 61 : fRegisterValue[kC10CPU0] .Init("C10CPU0", 0x0C02, 32, 0x00000000 );
196 61 : fRegisterValue[kC11CPU0] .Init("C11CPU0", 0x0C03, 32, 0x00000000 );
197 61 : fRegisterValue[kC12CPUA] .Init("C12CPUA", 0x0C04, 32, 0x00000000 );
198 61 : fRegisterValue[kC13CPUA] .Init("C13CPUA", 0x0C05, 32, 0x00000000 );
199 61 : fRegisterValue[kC14CPUA] .Init("C14CPUA", 0x0C06, 32, 0x00000000 );
200 61 : fRegisterValue[kC15CPUA] .Init("C15CPUA", 0x0C07, 32, 0x00000000 );
201 61 : fRegisterValue[kC08CPU1] .Init("C08CPU1", 0x0C08, 32, 0x00000000 );
202 61 : fRegisterValue[kC09CPU1] .Init("C09CPU1", 0x0C09, 32, 0x00000000 );
203 61 : fRegisterValue[kC10CPU1] .Init("C10CPU1", 0x0C0A, 32, 0x00000000 );
204 61 : fRegisterValue[kC11CPU1] .Init("C11CPU1", 0x0C0B, 32, 0x00000000 );
205 61 : fRegisterValue[kC08CPU2] .Init("C08CPU2", 0x0C10, 32, 0x00000000 );
206 61 : fRegisterValue[kC09CPU2] .Init("C09CPU2", 0x0C11, 32, 0x00000000 );
207 61 : fRegisterValue[kC10CPU2] .Init("C10CPU2", 0x0C12, 32, 0x00000000 );
208 61 : fRegisterValue[kC11CPU2] .Init("C11CPU2", 0x0C13, 32, 0x00000000 );
209 61 : fRegisterValue[kC08CPU3] .Init("C08CPU3", 0x0C18, 32, 0x00000000 );
210 61 : fRegisterValue[kC09CPU3] .Init("C09CPU3", 0x0C19, 32, 0x00000000 );
211 61 : fRegisterValue[kC10CPU3] .Init("C10CPU3", 0x0C1A, 32, 0x00000000 );
212 61 : fRegisterValue[kC11CPU3] .Init("C11CPU3", 0x0C1B, 32, 0x00000000 );
213 61 : fRegisterValue[kNMOD] .Init("NMOD", 0x0D40, 6, 0x08 ); // NI interface
214 61 : fRegisterValue[kNDLY] .Init("NDLY", 0x0D41, 30, 0x24924924 );
215 61 : fRegisterValue[kNED] .Init("NED", 0x0D42, 16, 0xA240 );
216 61 : fRegisterValue[kNTRO] .Init("NTRO", 0x0D43, 18, 0x3FFFC );
217 61 : fRegisterValue[kNRRO] .Init("NRRO", 0x0D44, 18, 0x3FFFC );
218 61 : fRegisterValue[kNES] .Init("NES", 0x0D45, 32, 0x00000000 );
219 61 : fRegisterValue[kNTP] .Init("NTP", 0x0D46, 32, 0x0000FFFF );
220 61 : fRegisterValue[kNBND] .Init("NBND", 0x0D47, 16, 0x6020 );
221 61 : fRegisterValue[kNP0] .Init("NP0", 0x0D48, 11, 0x44C );
222 61 : fRegisterValue[kNP1] .Init("NP1", 0x0D49, 11, 0x44C );
223 61 : fRegisterValue[kNP2] .Init("NP2", 0x0D4A, 11, 0x44C );
224 61 : fRegisterValue[kNP3] .Init("NP3", 0x0D4B, 11, 0x44C );
225 61 : fRegisterValue[kNCUT] .Init("NCUT", 0x0D4C, 32, 0xFFFFFFFF );
226 61 : fRegisterValue[kTPPT0] .Init("TPPT0", 0x3000, 7, 0x01 ); // Filter and Preprocessor
227 61 : fRegisterValue[kTPFS] .Init("TPFS", 0x3001, 7, 0x05 );
228 61 : fRegisterValue[kTPFE] .Init("TPFE", 0x3002, 7, 0x14 );
229 61 : fRegisterValue[kTPPGR] .Init("TPPGR", 0x3003, 7, 0x15 );
230 61 : fRegisterValue[kTPPAE] .Init("TPPAE", 0x3004, 7, 0x1E );
231 61 : fRegisterValue[kTPQS0] .Init("TPQS0", 0x3005, 7, 0x00 );
232 61 : fRegisterValue[kTPQE0] .Init("TPQE0", 0x3006, 7, 0x0A );
233 61 : fRegisterValue[kTPQS1] .Init("TPQS1", 0x3007, 7, 0x0B );
234 61 : fRegisterValue[kTPQE1] .Init("TPQE1", 0x3008, 7, 0x14 );
235 61 : fRegisterValue[kEBD] .Init("EBD", 0x3009, 3, 0x0 );
236 61 : fRegisterValue[kEBAQA] .Init("EBAQA", 0x300A, 7, 0x00 );
237 61 : fRegisterValue[kEBSIA] .Init("EBSIA", 0x300B, 7, 0x20 );
238 61 : fRegisterValue[kEBSF] .Init("EBSF", 0x300C, 1, 0x1 );
239 61 : fRegisterValue[kEBSIM] .Init("EBSIM", 0x300D, 1, 0x1 );
240 61 : fRegisterValue[kEBPP] .Init("EBPP", 0x300E, 1, 0x1 );
241 61 : fRegisterValue[kEBPC] .Init("EBPC", 0x300F, 1, 0x1 );
242 61 : fRegisterValue[kEBIS] .Init("EBIS", 0x3014, 10, 0x005 );
243 61 : fRegisterValue[kEBIT] .Init("EBIT", 0x3015, 12, 0x028 );
244 61 : fRegisterValue[kEBIL] .Init("EBIL", 0x3016, 8, 0xF0 );
245 61 : fRegisterValue[kEBIN] .Init("EBIN", 0x3017, 1, 0x1 );
246 61 : fRegisterValue[kFLBY] .Init("FLBY", 0x3018, 1, 0x0 );
247 61 : fRegisterValue[kFPBY] .Init("FPBY", 0x3019, 1, 0x0 );
248 61 : fRegisterValue[kFGBY] .Init("FGBY", 0x301A, 1, 0x0 );
249 61 : fRegisterValue[kFTBY] .Init("FTBY", 0x301B, 1, 0x0 );
250 61 : fRegisterValue[kFCBY] .Init("FCBY", 0x301C, 1, 0x0 );
251 61 : fRegisterValue[kFPTC] .Init("FPTC", 0x3020, 2, 0x3 );
252 61 : fRegisterValue[kFPNP] .Init("FPNP", 0x3021, 9, 0x078 );
253 61 : fRegisterValue[kFPCL] .Init("FPCL", 0x3022, 1, 0x1 );
254 61 : fRegisterValue[kFGTA] .Init("FGTA", 0x3028, 12, 0x014 );
255 61 : fRegisterValue[kFGTB] .Init("FGTB", 0x3029, 12, 0x80C );
256 61 : fRegisterValue[kFGCL] .Init("FGCL", 0x302A, 1, 0x1 );
257 61 : fRegisterValue[kFTAL] .Init("FTAL", 0x3030, 10, 0x0F6 );
258 61 : fRegisterValue[kFTLL] .Init("FTLL", 0x3031, 9, 0x11D );
259 61 : fRegisterValue[kFTLS] .Init("FTLS", 0x3032, 9, 0x0D3 );
260 61 : fRegisterValue[kFCW1] .Init("FCW1", 0x3038, 8, 0x1E );
261 61 : fRegisterValue[kFCW2] .Init("FCW2", 0x3039, 8, 0xD4 );
262 61 : fRegisterValue[kFCW3] .Init("FCW3", 0x303A, 8, 0xE6 );
263 61 : fRegisterValue[kFCW4] .Init("FCW4", 0x303B, 8, 0x4A );
264 61 : fRegisterValue[kFCW5] .Init("FCW5", 0x303C, 8, 0xEF );
265 61 : fRegisterValue[kTPFP] .Init("TPFP", 0x3040, 9, 0x037 );
266 61 : fRegisterValue[kTPHT] .Init("TPHT", 0x3041, 14, 0x00A0 );
267 61 : fRegisterValue[kTPVT] .Init("TPVT", 0x3042, 6, 0x00 );
268 61 : fRegisterValue[kTPVBY] .Init("TPVBY", 0x3043, 1, 0x0 );
269 61 : fRegisterValue[kTPCT] .Init("TPCT", 0x3044, 5, 0x08 );
270 61 : fRegisterValue[kTPCL] .Init("TPCL", 0x3045, 5, 0x01 );
271 61 : fRegisterValue[kTPCBY] .Init("TPCBY", 0x3046, 1, 0x1 );
272 61 : fRegisterValue[kTPD] .Init("TPD", 0x3047, 4, 0xF );
273 61 : fRegisterValue[kTPCI0] .Init("TPCI0", 0x3048, 5, 0x00 );
274 61 : fRegisterValue[kTPCI1] .Init("TPCI1", 0x3049, 5, 0x00 );
275 61 : fRegisterValue[kTPCI2] .Init("TPCI2", 0x304A, 5, 0x00 );
276 61 : fRegisterValue[kTPCI3] .Init("TPCI3", 0x304B, 5, 0x00 );
277 61 : fRegisterValue[kADCMSK] .Init("ADCMSK", 0x3050, 21, 0x1FFFFF );
278 61 : fRegisterValue[kADCINB] .Init("ADCINB", 0x3051, 2, 0x2 );
279 61 : fRegisterValue[kADCDAC] .Init("ADCDAC", 0x3052, 5, 0x10 );
280 61 : fRegisterValue[kADCPAR] .Init("ADCPAR", 0x3053, 18, 0x195EF );
281 61 : fRegisterValue[kADCTST] .Init("ADCTST", 0x3054, 2, 0x0 );
282 61 : fRegisterValue[kSADCAZ] .Init("SADCAZ", 0x3055, 1, 0x1 );
283 61 : fRegisterValue[kFGF0] .Init("FGF0", 0x3080, 9, 0x000 );
284 61 : fRegisterValue[kFGF1] .Init("FGF1", 0x3081, 9, 0x000 );
285 61 : fRegisterValue[kFGF2] .Init("FGF2", 0x3082, 9, 0x000 );
286 61 : fRegisterValue[kFGF3] .Init("FGF3", 0x3083, 9, 0x000 );
287 61 : fRegisterValue[kFGF4] .Init("FGF4", 0x3084, 9, 0x000 );
288 61 : fRegisterValue[kFGF5] .Init("FGF5", 0x3085, 9, 0x000 );
289 61 : fRegisterValue[kFGF6] .Init("FGF6", 0x3086, 9, 0x000 );
290 61 : fRegisterValue[kFGF7] .Init("FGF7", 0x3087, 9, 0x000 );
291 61 : fRegisterValue[kFGF8] .Init("FGF8", 0x3088, 9, 0x000 );
292 61 : fRegisterValue[kFGF9] .Init("FGF9", 0x3089, 9, 0x000 );
293 61 : fRegisterValue[kFGF10] .Init("FGF10", 0x308A, 9, 0x000 );
294 61 : fRegisterValue[kFGF11] .Init("FGF11", 0x308B, 9, 0x000 );
295 61 : fRegisterValue[kFGF12] .Init("FGF12", 0x308C, 9, 0x000 );
296 61 : fRegisterValue[kFGF13] .Init("FGF13", 0x308D, 9, 0x000 );
297 61 : fRegisterValue[kFGF14] .Init("FGF14", 0x308E, 9, 0x000 );
298 61 : fRegisterValue[kFGF15] .Init("FGF15", 0x308F, 9, 0x000 );
299 61 : fRegisterValue[kFGF16] .Init("FGF16", 0x3090, 9, 0x000 );
300 61 : fRegisterValue[kFGF17] .Init("FGF17", 0x3091, 9, 0x000 );
301 61 : fRegisterValue[kFGF18] .Init("FGF18", 0x3092, 9, 0x000 );
302 61 : fRegisterValue[kFGF19] .Init("FGF19", 0x3093, 9, 0x000 );
303 61 : fRegisterValue[kFGF20] .Init("FGF20", 0x3094, 9, 0x000 );
304 61 : fRegisterValue[kFGA0] .Init("FGA0", 0x30A0, 6, 0x00 );
305 61 : fRegisterValue[kFGA1] .Init("FGA1", 0x30A1, 6, 0x00 );
306 61 : fRegisterValue[kFGA2] .Init("FGA2", 0x30A2, 6, 0x00 );
307 61 : fRegisterValue[kFGA3] .Init("FGA3", 0x30A3, 6, 0x00 );
308 61 : fRegisterValue[kFGA4] .Init("FGA4", 0x30A4, 6, 0x00 );
309 61 : fRegisterValue[kFGA5] .Init("FGA5", 0x30A5, 6, 0x00 );
310 61 : fRegisterValue[kFGA6] .Init("FGA6", 0x30A6, 6, 0x00 );
311 61 : fRegisterValue[kFGA7] .Init("FGA7", 0x30A7, 6, 0x00 );
312 61 : fRegisterValue[kFGA8] .Init("FGA8", 0x30A8, 6, 0x00 );
313 61 : fRegisterValue[kFGA9] .Init("FGA9", 0x30A9, 6, 0x00 );
314 61 : fRegisterValue[kFGA10] .Init("FGA10", 0x30AA, 6, 0x00 );
315 61 : fRegisterValue[kFGA11] .Init("FGA11", 0x30AB, 6, 0x00 );
316 61 : fRegisterValue[kFGA12] .Init("FGA12", 0x30AC, 6, 0x00 );
317 61 : fRegisterValue[kFGA13] .Init("FGA13", 0x30AD, 6, 0x00 );
318 61 : fRegisterValue[kFGA14] .Init("FGA14", 0x30AE, 6, 0x00 );
319 61 : fRegisterValue[kFGA15] .Init("FGA15", 0x30AF, 6, 0x00 );
320 61 : fRegisterValue[kFGA16] .Init("FGA16", 0x30B0, 6, 0x00 );
321 61 : fRegisterValue[kFGA17] .Init("FGA17", 0x30B1, 6, 0x00 );
322 61 : fRegisterValue[kFGA18] .Init("FGA18", 0x30B2, 6, 0x00 );
323 61 : fRegisterValue[kFGA19] .Init("FGA19", 0x30B3, 6, 0x00 );
324 61 : fRegisterValue[kFGA20] .Init("FGA20", 0x30B4, 6, 0x00 );
325 61 : fRegisterValue[kFLL00] .Init("FLL00", 0x3100, 6, 0x00 ); // non-linearity table, 64 x 6 bits
326 61 : fRegisterValue[kFLL01] .Init("FLL01", 0x3101, 6, 0x00 );
327 61 : fRegisterValue[kFLL02] .Init("FLL02", 0x3102, 6, 0x00 );
328 61 : fRegisterValue[kFLL03] .Init("FLL03", 0x3103, 6, 0x00 );
329 61 : fRegisterValue[kFLL04] .Init("FLL04", 0x3104, 6, 0x00 );
330 61 : fRegisterValue[kFLL05] .Init("FLL05", 0x3105, 6, 0x00 );
331 61 : fRegisterValue[kFLL06] .Init("FLL06", 0x3106, 6, 0x00 );
332 61 : fRegisterValue[kFLL07] .Init("FLL07", 0x3107, 6, 0x00 );
333 61 : fRegisterValue[kFLL08] .Init("FLL08", 0x3108, 6, 0x00 );
334 61 : fRegisterValue[kFLL09] .Init("FLL09", 0x3109, 6, 0x00 );
335 61 : fRegisterValue[kFLL0A] .Init("FLL0A", 0x310A, 6, 0x00 );
336 61 : fRegisterValue[kFLL0B] .Init("FLL0B", 0x310B, 6, 0x00 );
337 61 : fRegisterValue[kFLL0C] .Init("FLL0C", 0x310C, 6, 0x00 );
338 61 : fRegisterValue[kFLL0D] .Init("FLL0D", 0x310D, 6, 0x00 );
339 61 : fRegisterValue[kFLL0E] .Init("FLL0E", 0x310E, 6, 0x00 );
340 61 : fRegisterValue[kFLL0F] .Init("FLL0F", 0x310F, 6, 0x00 );
341 61 : fRegisterValue[kFLL10] .Init("FLL10", 0x3110, 6, 0x00 );
342 61 : fRegisterValue[kFLL11] .Init("FLL11", 0x3111, 6, 0x00 );
343 61 : fRegisterValue[kFLL12] .Init("FLL12", 0x3112, 6, 0x00 );
344 61 : fRegisterValue[kFLL13] .Init("FLL13", 0x3113, 6, 0x00 );
345 61 : fRegisterValue[kFLL14] .Init("FLL14", 0x3114, 6, 0x00 );
346 61 : fRegisterValue[kFLL15] .Init("FLL15", 0x3115, 6, 0x00 );
347 61 : fRegisterValue[kFLL16] .Init("FLL16", 0x3116, 6, 0x00 );
348 61 : fRegisterValue[kFLL17] .Init("FLL17", 0x3117, 6, 0x00 );
349 61 : fRegisterValue[kFLL18] .Init("FLL18", 0x3118, 6, 0x00 );
350 61 : fRegisterValue[kFLL19] .Init("FLL19", 0x3119, 6, 0x00 );
351 61 : fRegisterValue[kFLL1A] .Init("FLL1A", 0x311A, 6, 0x00 );
352 61 : fRegisterValue[kFLL1B] .Init("FLL1B", 0x311B, 6, 0x00 );
353 61 : fRegisterValue[kFLL1C] .Init("FLL1C", 0x311C, 6, 0x00 );
354 61 : fRegisterValue[kFLL1D] .Init("FLL1D", 0x311D, 6, 0x00 );
355 61 : fRegisterValue[kFLL1E] .Init("FLL1E", 0x311E, 6, 0x00 );
356 61 : fRegisterValue[kFLL1F] .Init("FLL1F", 0x311F, 6, 0x00 );
357 61 : fRegisterValue[kFLL20] .Init("FLL20", 0x3120, 6, 0x00 );
358 61 : fRegisterValue[kFLL21] .Init("FLL21", 0x3121, 6, 0x00 );
359 61 : fRegisterValue[kFLL22] .Init("FLL22", 0x3122, 6, 0x00 );
360 61 : fRegisterValue[kFLL23] .Init("FLL23", 0x3123, 6, 0x00 );
361 61 : fRegisterValue[kFLL24] .Init("FLL24", 0x3124, 6, 0x00 );
362 61 : fRegisterValue[kFLL25] .Init("FLL25", 0x3125, 6, 0x00 );
363 61 : fRegisterValue[kFLL26] .Init("FLL26", 0x3126, 6, 0x00 );
364 61 : fRegisterValue[kFLL27] .Init("FLL27", 0x3127, 6, 0x00 );
365 61 : fRegisterValue[kFLL28] .Init("FLL28", 0x3128, 6, 0x00 );
366 61 : fRegisterValue[kFLL29] .Init("FLL29", 0x3129, 6, 0x00 );
367 61 : fRegisterValue[kFLL2A] .Init("FLL2A", 0x312A, 6, 0x00 );
368 61 : fRegisterValue[kFLL2B] .Init("FLL2B", 0x312B, 6, 0x00 );
369 61 : fRegisterValue[kFLL2C] .Init("FLL2C", 0x312C, 6, 0x00 );
370 61 : fRegisterValue[kFLL2D] .Init("FLL2D", 0x312D, 6, 0x00 );
371 61 : fRegisterValue[kFLL2E] .Init("FLL2E", 0x312E, 6, 0x00 );
372 61 : fRegisterValue[kFLL2F] .Init("FLL2F", 0x312F, 6, 0x00 );
373 61 : fRegisterValue[kFLL30] .Init("FLL30", 0x3130, 6, 0x00 );
374 61 : fRegisterValue[kFLL31] .Init("FLL31", 0x3131, 6, 0x00 );
375 61 : fRegisterValue[kFLL32] .Init("FLL32", 0x3132, 6, 0x00 );
376 61 : fRegisterValue[kFLL33] .Init("FLL33", 0x3133, 6, 0x00 );
377 61 : fRegisterValue[kFLL34] .Init("FLL34", 0x3134, 6, 0x00 );
378 61 : fRegisterValue[kFLL35] .Init("FLL35", 0x3135, 6, 0x00 );
379 61 : fRegisterValue[kFLL36] .Init("FLL36", 0x3136, 6, 0x00 );
380 61 : fRegisterValue[kFLL37] .Init("FLL37", 0x3137, 6, 0x00 );
381 61 : fRegisterValue[kFLL38] .Init("FLL38", 0x3138, 6, 0x00 );
382 61 : fRegisterValue[kFLL39] .Init("FLL39", 0x3139, 6, 0x00 );
383 61 : fRegisterValue[kFLL3A] .Init("FLL3A", 0x313A, 6, 0x00 );
384 61 : fRegisterValue[kFLL3B] .Init("FLL3B", 0x313B, 6, 0x00 );
385 61 : fRegisterValue[kFLL3C] .Init("FLL3C", 0x313C, 6, 0x00 );
386 61 : fRegisterValue[kFLL3D] .Init("FLL3D", 0x313D, 6, 0x00 );
387 61 : fRegisterValue[kFLL3E] .Init("FLL3E", 0x313E, 6, 0x00 );
388 61 : fRegisterValue[kFLL3F] .Init("FLL3F", 0x313F, 6, 0x00 );
389 61 : fRegisterValue[kPASADEL] .Init("PASADEL", 0x3158, 8, 0xFF ); // end of non-lin table
390 61 : fRegisterValue[kPASAPHA] .Init("PASAPHA", 0x3159, 6, 0x3F );
391 61 : fRegisterValue[kPASAPRA] .Init("PASAPRA", 0x315A, 6, 0x0F );
392 61 : fRegisterValue[kPASADAC] .Init("PASADAC", 0x315B, 8, 0x80 );
393 61 : fRegisterValue[kPASACHM] .Init("PASACHM", 0x315C, 19, 0x7FFFF );
394 61 : fRegisterValue[kPASASTL] .Init("PASASTL", 0x315D, 8, 0xFF );
395 61 : fRegisterValue[kPASAPR1] .Init("PASAPR1", 0x315E, 1, 0x0 );
396 61 : fRegisterValue[kPASAPR0] .Init("PASAPR0", 0x315F, 1, 0x0 );
397 61 : fRegisterValue[kSADCTRG] .Init("SADCTRG", 0x3161, 1, 0x0 );
398 61 : fRegisterValue[kSADCRUN] .Init("SADCRUN", 0x3162, 1, 0x0 );
399 61 : fRegisterValue[kSADCPWR] .Init("SADCPWR", 0x3163, 3, 0x7 );
400 61 : fRegisterValue[kL0TSIM] .Init("L0TSIM", 0x3165, 14, 0x0050 );
401 61 : fRegisterValue[kSADCEC] .Init("SADCEC", 0x3166, 7, 0x00 );
402 61 : fRegisterValue[kSADCMC] .Init("SADCMC", 0x3170, 8, 0xC0 );
403 61 : fRegisterValue[kSADCOC] .Init("SADCOC", 0x3171, 8, 0x19 );
404 61 : fRegisterValue[kSADCGTB] .Init("SADCGTB", 0x3172, 32, 0x37737700 );
405 61 : fRegisterValue[kSEBDEN] .Init("SEBDEN", 0x3178, 3, 0x0 );
406 61 : fRegisterValue[kSEBDOU] .Init("SEBDOU", 0x3179, 3, 0x0 );
407 61 : fRegisterValue[kTPL00] .Init("TPL00", 0x3180, 5, 0x00 ); // pos table, 128 x 5 bits
408 61 : fRegisterValue[kTPL01] .Init("TPL01", 0x3181, 5, 0x00 );
409 61 : fRegisterValue[kTPL02] .Init("TPL02", 0x3182, 5, 0x00 );
410 61 : fRegisterValue[kTPL03] .Init("TPL03", 0x3183, 5, 0x00 );
411 61 : fRegisterValue[kTPL04] .Init("TPL04", 0x3184, 5, 0x00 );
412 61 : fRegisterValue[kTPL05] .Init("TPL05", 0x3185, 5, 0x00 );
413 61 : fRegisterValue[kTPL06] .Init("TPL06", 0x3186, 5, 0x00 );
414 61 : fRegisterValue[kTPL07] .Init("TPL07", 0x3187, 5, 0x00 );
415 61 : fRegisterValue[kTPL08] .Init("TPL08", 0x3188, 5, 0x00 );
416 61 : fRegisterValue[kTPL09] .Init("TPL09", 0x3189, 5, 0x00 );
417 61 : fRegisterValue[kTPL0A] .Init("TPL0A", 0x318A, 5, 0x00 );
418 61 : fRegisterValue[kTPL0B] .Init("TPL0B", 0x318B, 5, 0x00 );
419 61 : fRegisterValue[kTPL0C] .Init("TPL0C", 0x318C, 5, 0x00 );
420 61 : fRegisterValue[kTPL0D] .Init("TPL0D", 0x318D, 5, 0x00 );
421 61 : fRegisterValue[kTPL0E] .Init("TPL0E", 0x318E, 5, 0x00 );
422 61 : fRegisterValue[kTPL0F] .Init("TPL0F", 0x318F, 5, 0x00 );
423 61 : fRegisterValue[kTPL10] .Init("TPL10", 0x3190, 5, 0x00 );
424 61 : fRegisterValue[kTPL11] .Init("TPL11", 0x3191, 5, 0x00 );
425 61 : fRegisterValue[kTPL12] .Init("TPL12", 0x3192, 5, 0x00 );
426 61 : fRegisterValue[kTPL13] .Init("TPL13", 0x3193, 5, 0x00 );
427 61 : fRegisterValue[kTPL14] .Init("TPL14", 0x3194, 5, 0x00 );
428 61 : fRegisterValue[kTPL15] .Init("TPL15", 0x3195, 5, 0x00 );
429 61 : fRegisterValue[kTPL16] .Init("TPL16", 0x3196, 5, 0x00 );
430 61 : fRegisterValue[kTPL17] .Init("TPL17", 0x3197, 5, 0x00 );
431 61 : fRegisterValue[kTPL18] .Init("TPL18", 0x3198, 5, 0x00 );
432 61 : fRegisterValue[kTPL19] .Init("TPL19", 0x3199, 5, 0x00 );
433 61 : fRegisterValue[kTPL1A] .Init("TPL1A", 0x319A, 5, 0x00 );
434 61 : fRegisterValue[kTPL1B] .Init("TPL1B", 0x319B, 5, 0x00 );
435 61 : fRegisterValue[kTPL1C] .Init("TPL1C", 0x319C, 5, 0x00 );
436 61 : fRegisterValue[kTPL1D] .Init("TPL1D", 0x319D, 5, 0x00 );
437 61 : fRegisterValue[kTPL1E] .Init("TPL1E", 0x319E, 5, 0x00 );
438 61 : fRegisterValue[kTPL1F] .Init("TPL1F", 0x319F, 5, 0x00 );
439 61 : fRegisterValue[kTPL20] .Init("TPL20", 0x31A0, 5, 0x00 );
440 61 : fRegisterValue[kTPL21] .Init("TPL21", 0x31A1, 5, 0x00 );
441 61 : fRegisterValue[kTPL22] .Init("TPL22", 0x31A2, 5, 0x00 );
442 61 : fRegisterValue[kTPL23] .Init("TPL23", 0x31A3, 5, 0x00 );
443 61 : fRegisterValue[kTPL24] .Init("TPL24", 0x31A4, 5, 0x00 );
444 61 : fRegisterValue[kTPL25] .Init("TPL25", 0x31A5, 5, 0x00 );
445 61 : fRegisterValue[kTPL26] .Init("TPL26", 0x31A6, 5, 0x00 );
446 61 : fRegisterValue[kTPL27] .Init("TPL27", 0x31A7, 5, 0x00 );
447 61 : fRegisterValue[kTPL28] .Init("TPL28", 0x31A8, 5, 0x00 );
448 61 : fRegisterValue[kTPL29] .Init("TPL29", 0x31A9, 5, 0x00 );
449 61 : fRegisterValue[kTPL2A] .Init("TPL2A", 0x31AA, 5, 0x00 );
450 61 : fRegisterValue[kTPL2B] .Init("TPL2B", 0x31AB, 5, 0x00 );
451 61 : fRegisterValue[kTPL2C] .Init("TPL2C", 0x31AC, 5, 0x00 );
452 61 : fRegisterValue[kTPL2D] .Init("TPL2D", 0x31AD, 5, 0x00 );
453 61 : fRegisterValue[kTPL2E] .Init("TPL2E", 0x31AE, 5, 0x00 );
454 61 : fRegisterValue[kTPL2F] .Init("TPL2F", 0x31AF, 5, 0x00 );
455 61 : fRegisterValue[kTPL30] .Init("TPL30", 0x31B0, 5, 0x00 );
456 61 : fRegisterValue[kTPL31] .Init("TPL31", 0x31B1, 5, 0x00 );
457 61 : fRegisterValue[kTPL32] .Init("TPL32", 0x31B2, 5, 0x00 );
458 61 : fRegisterValue[kTPL33] .Init("TPL33", 0x31B3, 5, 0x00 );
459 61 : fRegisterValue[kTPL34] .Init("TPL34", 0x31B4, 5, 0x00 );
460 61 : fRegisterValue[kTPL35] .Init("TPL35", 0x31B5, 5, 0x00 );
461 61 : fRegisterValue[kTPL36] .Init("TPL36", 0x31B6, 5, 0x00 );
462 61 : fRegisterValue[kTPL37] .Init("TPL37", 0x31B7, 5, 0x00 );
463 61 : fRegisterValue[kTPL38] .Init("TPL38", 0x31B8, 5, 0x00 );
464 61 : fRegisterValue[kTPL39] .Init("TPL39", 0x31B9, 5, 0x00 );
465 61 : fRegisterValue[kTPL3A] .Init("TPL3A", 0x31BA, 5, 0x00 );
466 61 : fRegisterValue[kTPL3B] .Init("TPL3B", 0x31BB, 5, 0x00 );
467 61 : fRegisterValue[kTPL3C] .Init("TPL3C", 0x31BC, 5, 0x00 );
468 61 : fRegisterValue[kTPL3D] .Init("TPL3D", 0x31BD, 5, 0x00 );
469 61 : fRegisterValue[kTPL3E] .Init("TPL3E", 0x31BE, 5, 0x00 );
470 61 : fRegisterValue[kTPL3F] .Init("TPL3F", 0x31BF, 5, 0x00 );
471 61 : fRegisterValue[kTPL40] .Init("TPL40", 0x31C0, 5, 0x00 );
472 61 : fRegisterValue[kTPL41] .Init("TPL41", 0x31C1, 5, 0x00 );
473 61 : fRegisterValue[kTPL42] .Init("TPL42", 0x31C2, 5, 0x00 );
474 61 : fRegisterValue[kTPL43] .Init("TPL43", 0x31C3, 5, 0x00 );
475 61 : fRegisterValue[kTPL44] .Init("TPL44", 0x31C4, 5, 0x00 );
476 61 : fRegisterValue[kTPL45] .Init("TPL45", 0x31C5, 5, 0x00 );
477 61 : fRegisterValue[kTPL46] .Init("TPL46", 0x31C6, 5, 0x00 );
478 61 : fRegisterValue[kTPL47] .Init("TPL47", 0x31C7, 5, 0x00 );
479 61 : fRegisterValue[kTPL48] .Init("TPL48", 0x31C8, 5, 0x00 );
480 61 : fRegisterValue[kTPL49] .Init("TPL49", 0x31C9, 5, 0x00 );
481 61 : fRegisterValue[kTPL4A] .Init("TPL4A", 0x31CA, 5, 0x00 );
482 61 : fRegisterValue[kTPL4B] .Init("TPL4B", 0x31CB, 5, 0x00 );
483 61 : fRegisterValue[kTPL4C] .Init("TPL4C", 0x31CC, 5, 0x00 );
484 61 : fRegisterValue[kTPL4D] .Init("TPL4D", 0x31CD, 5, 0x00 );
485 61 : fRegisterValue[kTPL4E] .Init("TPL4E", 0x31CE, 5, 0x00 );
486 61 : fRegisterValue[kTPL4F] .Init("TPL4F", 0x31CF, 5, 0x00 );
487 61 : fRegisterValue[kTPL50] .Init("TPL50", 0x31D0, 5, 0x00 );
488 61 : fRegisterValue[kTPL51] .Init("TPL51", 0x31D1, 5, 0x00 );
489 61 : fRegisterValue[kTPL52] .Init("TPL52", 0x31D2, 5, 0x00 );
490 61 : fRegisterValue[kTPL53] .Init("TPL53", 0x31D3, 5, 0x00 );
491 61 : fRegisterValue[kTPL54] .Init("TPL54", 0x31D4, 5, 0x00 );
492 61 : fRegisterValue[kTPL55] .Init("TPL55", 0x31D5, 5, 0x00 );
493 61 : fRegisterValue[kTPL56] .Init("TPL56", 0x31D6, 5, 0x00 );
494 61 : fRegisterValue[kTPL57] .Init("TPL57", 0x31D7, 5, 0x00 );
495 61 : fRegisterValue[kTPL58] .Init("TPL58", 0x31D8, 5, 0x00 );
496 61 : fRegisterValue[kTPL59] .Init("TPL59", 0x31D9, 5, 0x00 );
497 61 : fRegisterValue[kTPL5A] .Init("TPL5A", 0x31DA, 5, 0x00 );
498 61 : fRegisterValue[kTPL5B] .Init("TPL5B", 0x31DB, 5, 0x00 );
499 61 : fRegisterValue[kTPL5C] .Init("TPL5C", 0x31DC, 5, 0x00 );
500 61 : fRegisterValue[kTPL5D] .Init("TPL5D", 0x31DD, 5, 0x00 );
501 61 : fRegisterValue[kTPL5E] .Init("TPL5E", 0x31DE, 5, 0x00 );
502 61 : fRegisterValue[kTPL5F] .Init("TPL5F", 0x31DF, 5, 0x00 );
503 61 : fRegisterValue[kTPL60] .Init("TPL60", 0x31E0, 5, 0x00 );
504 61 : fRegisterValue[kTPL61] .Init("TPL61", 0x31E1, 5, 0x00 );
505 61 : fRegisterValue[kTPL62] .Init("TPL62", 0x31E2, 5, 0x00 );
506 61 : fRegisterValue[kTPL63] .Init("TPL63", 0x31E3, 5, 0x00 );
507 61 : fRegisterValue[kTPL64] .Init("TPL64", 0x31E4, 5, 0x00 );
508 61 : fRegisterValue[kTPL65] .Init("TPL65", 0x31E5, 5, 0x00 );
509 61 : fRegisterValue[kTPL66] .Init("TPL66", 0x31E6, 5, 0x00 );
510 61 : fRegisterValue[kTPL67] .Init("TPL67", 0x31E7, 5, 0x00 );
511 61 : fRegisterValue[kTPL68] .Init("TPL68", 0x31E8, 5, 0x00 );
512 61 : fRegisterValue[kTPL69] .Init("TPL69", 0x31E9, 5, 0x00 );
513 61 : fRegisterValue[kTPL6A] .Init("TPL6A", 0x31EA, 5, 0x00 );
514 61 : fRegisterValue[kTPL6B] .Init("TPL6B", 0x31EB, 5, 0x00 );
515 61 : fRegisterValue[kTPL6C] .Init("TPL6C", 0x31EC, 5, 0x00 );
516 61 : fRegisterValue[kTPL6D] .Init("TPL6D", 0x31ED, 5, 0x00 );
517 61 : fRegisterValue[kTPL6E] .Init("TPL6E", 0x31EE, 5, 0x00 );
518 61 : fRegisterValue[kTPL6F] .Init("TPL6F", 0x31EF, 5, 0x00 );
519 61 : fRegisterValue[kTPL70] .Init("TPL70", 0x31F0, 5, 0x00 );
520 61 : fRegisterValue[kTPL71] .Init("TPL71", 0x31F1, 5, 0x00 );
521 61 : fRegisterValue[kTPL72] .Init("TPL72", 0x31F2, 5, 0x00 );
522 61 : fRegisterValue[kTPL73] .Init("TPL73", 0x31F3, 5, 0x00 );
523 61 : fRegisterValue[kTPL74] .Init("TPL74", 0x31F4, 5, 0x00 );
524 61 : fRegisterValue[kTPL75] .Init("TPL75", 0x31F5, 5, 0x00 );
525 61 : fRegisterValue[kTPL76] .Init("TPL76", 0x31F6, 5, 0x00 );
526 61 : fRegisterValue[kTPL77] .Init("TPL77", 0x31F7, 5, 0x00 );
527 61 : fRegisterValue[kTPL78] .Init("TPL78", 0x31F8, 5, 0x00 );
528 61 : fRegisterValue[kTPL79] .Init("TPL79", 0x31F9, 5, 0x00 );
529 61 : fRegisterValue[kTPL7A] .Init("TPL7A", 0x31FA, 5, 0x00 );
530 61 : fRegisterValue[kTPL7B] .Init("TPL7B", 0x31FB, 5, 0x00 );
531 61 : fRegisterValue[kTPL7C] .Init("TPL7C", 0x31FC, 5, 0x00 );
532 61 : fRegisterValue[kTPL7D] .Init("TPL7D", 0x31FD, 5, 0x00 );
533 61 : fRegisterValue[kTPL7E] .Init("TPL7E", 0x31FE, 5, 0x00 );
534 61 : fRegisterValue[kTPL7F] .Init("TPL7F", 0x31FF, 5, 0x00 );
535 61 : fRegisterValue[kMEMRW] .Init("MEMRW", 0xD000, 7, 0x79 ); // end of pos table
536 61 : fRegisterValue[kMEMCOR] .Init("MEMCOR", 0xD001, 9, 0x000 );
537 61 : fRegisterValue[kDMDELA] .Init("DMDELA", 0xD002, 4, 0x8 );
538 61 : fRegisterValue[kDMDELS] .Init("DMDELS", 0xD003, 4, 0x8 );
539 61 : }
540 :
541 :
542 : void AliTRDtrapConfig::ResetRegs()
543 : {
544 : // Reset the content of all TRAP registers to the reset values (see TRAP User Manual)
545 :
546 53131 : for (Int_t iReg = 0; iReg < kLastReg; iReg++) {
547 26474 : fRegisterValue[iReg].Reset();
548 : }
549 61 : }
550 :
551 :
552 : void AliTRDtrapConfig::ResetDmem()
553 : {
554 : // reset the data memory
555 :
556 0 : for(Int_t iAddr = 0; iAddr < fgkDmemWords; iAddr++)
557 0 : fDmem[iAddr].Reset();
558 0 : }
559 :
560 :
561 : Int_t AliTRDtrapConfig::GetTrapReg(TrapReg_t reg, Int_t det, Int_t rob, Int_t mcm) const
562 : {
563 : // get the value of an individual TRAP register
564 : // if it is individual for TRAPs a valid TRAP has to be specified
565 :
566 385591036 : if ((reg < 0) || (reg >= kLastReg)) {
567 0 : AliError("Non-existing register requested");
568 0 : return 0;
569 : }
570 : else {
571 192795518 : return fRegisterValue[reg].GetValue(det, rob, mcm);
572 : }
573 192795518 : }
574 :
575 :
576 : Bool_t AliTRDtrapConfig::SetTrapReg(TrapReg_t reg, Int_t value, Int_t det)
577 : {
578 : // set a value for the given TRAP register on all chambers,
579 :
580 213840 : return fRegisterValue[reg].SetValue(value, det);
581 : }
582 :
583 :
584 : Bool_t AliTRDtrapConfig::SetTrapReg(TrapReg_t reg, Int_t value, Int_t det, Int_t rob, Int_t mcm)
585 : {
586 : // set the value for the given TRAP register of an individual MCM
587 :
588 0 : return fRegisterValue[reg].SetValue(value, det, rob, mcm);
589 : }
590 :
591 :
592 : UInt_t AliTRDtrapConfig::Peek(Int_t addr, Int_t det, Int_t rob, Int_t mcm) const
593 : {
594 : // reading from given address
595 :
596 0 : if ( (addr >= fgkDmemStartAddress) &&
597 0 : (addr < (fgkDmemStartAddress + fgkDmemWords)) ) {
598 0 : return GetDmemUnsigned(addr, det, rob, mcm);
599 : }
600 : else {
601 0 : TrapReg_t mcmReg = GetRegByAddress(addr);
602 0 : if ( mcmReg >= 0 && mcmReg < kLastReg) {
603 0 : return (UInt_t) GetTrapReg(mcmReg, det, rob, mcm);
604 : }
605 0 : }
606 :
607 0 : AliError(Form("peek for invalid addr: 0x%04x", addr));
608 0 : return 0;
609 0 : }
610 :
611 :
612 : Bool_t AliTRDtrapConfig::Poke(Int_t addr, UInt_t value, Int_t det, Int_t rob, Int_t mcm)
613 : {
614 : // writing to given address
615 :
616 0 : if ( (addr >= fgkDmemStartAddress) &&
617 0 : (addr < (fgkDmemStartAddress + fgkDmemWords)) ) {
618 0 : AliDebug(2, Form("DMEM 0x%08x : %i", addr, value));
619 0 : return SetDmem(addr, value, det, rob, mcm);
620 : }
621 : else {
622 0 : TrapReg_t mcmReg = GetRegByAddress(addr);
623 0 : if ( mcmReg >= 0 && mcmReg < kLastReg) {
624 0 : AliDebug(2, Form("Register: %s : %i\n", GetRegName(mcmReg), value));
625 0 : return SetTrapReg(mcmReg, (UInt_t) value, det, rob, mcm);
626 : }
627 0 : }
628 :
629 0 : AliError(Form("poke for invalid address: 0x%04x", addr));
630 0 : return kFALSE;
631 0 : }
632 :
633 :
634 : Bool_t AliTRDtrapConfig::SetDmemAlloc(Int_t addr, Alloc_t mode)
635 : {
636 2048 : addr = addr - fgkDmemStartAddress;
637 :
638 1024 : if(addr < 0 || addr >= fgkDmemWords) {
639 0 : AliError(Form("Invalid DMEM address: 0x%04x", addr+fgkDmemStartAddress));
640 0 : return kFALSE;
641 : }
642 : else {
643 1024 : fDmem[addr].Allocate(mode);
644 1024 : return kTRUE;
645 : }
646 1024 : }
647 :
648 :
649 : Bool_t AliTRDtrapConfig::SetDmem(Int_t addr, UInt_t value, Int_t det)
650 : {
651 : // Set the content of the given DMEM address
652 :
653 0 : addr = addr - fgkDmemStartAddress;
654 :
655 0 : if(addr < 0 || addr >= fgkDmemWords) {
656 0 : AliError(Form("No DMEM address: 0x%08x", addr+fgkDmemStartAddress));
657 0 : return kFALSE;
658 : }
659 :
660 0 : if (!fDmem[addr].SetValue(value, det)) {
661 0 : AliError(Form("Problem writing to DMEM address 0x%04x", addr));
662 0 : return kFALSE;
663 : }
664 : else
665 0 : return kTRUE;
666 0 : }
667 :
668 :
669 : Bool_t AliTRDtrapConfig::SetDmem(Int_t addr, UInt_t value, Int_t det, Int_t rob, Int_t mcm)
670 : {
671 : // Set the content of the given DMEM address
672 5126112 : addr = addr - fgkDmemStartAddress;
673 :
674 2563056 : if(addr < 0 || addr >= fgkDmemWords) {
675 0 : AliError(Form("No DMEM address: 0x%08x", addr+fgkDmemStartAddress));
676 0 : return kFALSE;
677 : }
678 :
679 2563056 : if (!fDmem[addr].SetValue(value, det, rob, mcm)) {
680 0 : AliError(Form("Problem writing to DMEM address 0x%04x", addr));
681 0 : return kFALSE;
682 : }
683 : else
684 2563056 : return kTRUE;
685 2563056 : }
686 :
687 :
688 : UInt_t AliTRDtrapConfig::GetDmemUnsigned(Int_t addr, Int_t det, Int_t rob, Int_t mcm) const
689 : {
690 : // get the content of the data memory at the given address
691 : // (only if the value is the same for all MCMs)
692 :
693 12766 : addr = addr - fgkDmemStartAddress;
694 :
695 6383 : if(addr < 0 || addr >= fgkDmemWords) {
696 0 : AliError(Form("No DMEM address: 0x%08x", addr+fgkDmemStartAddress));
697 0 : return 0;
698 : }
699 :
700 6383 : return fDmem[addr].GetValue(det, rob, mcm);
701 6383 : }
702 :
703 :
704 : Bool_t AliTRDtrapConfig::PrintTrapReg(TrapReg_t reg, Int_t det, Int_t rob, Int_t mcm) const
705 : {
706 : // print the value stored in the given register
707 : // if it is individual a valid MCM has to be specified
708 :
709 0 : if((det >= 0 && det < AliTRDgeometry::Ndet()) &&
710 0 : (rob >= 0 && rob < AliTRDfeeParam::GetNrobC1()) &&
711 0 : (mcm >= 0 && mcm < AliTRDfeeParam::GetNmcmRob() + 2)) {
712 0 : printf("%10s (%2i bits) at 0x%04x is 0x%08x and resets to: 0x%08x (currently individual mode)\n",
713 0 : GetRegName((TrapReg_t) reg),
714 0 : GetRegNBits((TrapReg_t) reg),
715 0 : GetRegAddress((TrapReg_t) reg),
716 0 : fRegisterValue[reg].GetValue(det, rob, mcm),
717 0 : GetRegResetValue((TrapReg_t) reg));
718 : }
719 : else {
720 0 : AliError("Register value is MCM-specific: Invalid detector, ROB or MCM requested");
721 0 : return kFALSE;
722 : }
723 :
724 0 : return kTRUE;
725 0 : }
726 :
727 :
728 : Bool_t AliTRDtrapConfig::PrintTrapAddr(Int_t addr, Int_t det, Int_t rob, Int_t mcm) const
729 : {
730 : // print the value stored at the given address in the MCM chip
731 0 : TrapReg_t reg = GetRegByAddress(addr);
732 0 : if (reg >= 0 && reg < kLastReg) {
733 0 : return PrintTrapReg(reg, det, rob, mcm);
734 : }
735 : else {
736 0 : AliError(Form("There is no register at address 0x%08x in the simulator", addr));
737 0 : return kFALSE;
738 : }
739 0 : }
740 :
741 :
742 : AliTRDtrapConfig::TrapReg_t AliTRDtrapConfig::GetRegByAddress(Int_t address) const
743 : {
744 : // get register by its address
745 : // used for reading of configuration data as sent to real FEE
746 :
747 5122872 : if (address < fgkRegisterAddressBlockStart[0])
748 0 : return kLastReg;
749 2561436 : else if (address < fgkRegisterAddressBlockStart[0] + fgkRegisterAddressBlockSize[0])
750 0 : return fgRegAddressMap[address - fgkRegisterAddressBlockStart[0]];
751 2561436 : else if (address < fgkRegisterAddressBlockStart[1])
752 0 : return kLastReg;
753 2561436 : else if (address < fgkRegisterAddressBlockStart[1] + fgkRegisterAddressBlockSize[1])
754 0 : return fgRegAddressMap[address - fgkRegisterAddressBlockStart[1] + fgkRegisterAddressBlockSize[0]];
755 2561436 : else if (address < fgkRegisterAddressBlockStart[2])
756 2561436 : return kLastReg;
757 0 : else if (address < fgkRegisterAddressBlockStart[2] + fgkRegisterAddressBlockSize[2])
758 0 : return fgRegAddressMap[address - fgkRegisterAddressBlockStart[2] + fgkRegisterAddressBlockSize[1] + fgkRegisterAddressBlockSize[0]];
759 : else
760 0 : return kLastReg;
761 2561436 : }
762 :
763 :
764 : void AliTRDtrapConfig::PrintMemDatx(ostream &os, Int_t addr) const
765 : {
766 : // print the content of the data memory as datx
767 :
768 0 : PrintMemDatx(os, addr, 0, 0, 127);
769 0 : }
770 :
771 : void AliTRDtrapConfig::PrintMemDatx(ostream &os, Int_t addr, Int_t det, Int_t rob, Int_t mcm) const
772 : {
773 : // print the content of the data memory as datx
774 :
775 0 : if(addr < fgkDmemStartAddress || addr >= fgkDmemStartAddress+fgkDmemWords) {
776 0 : AliError(Form("Invalid DMEM address 0x%08x!", addr));
777 0 : return;
778 : }
779 0 : PrintDatx(os, addr, GetDmemUnsigned(addr, det, rob, mcm), rob, mcm);
780 0 : }
781 :
782 :
783 : void AliTRDtrapConfig::PrintMemDatx(ostream &os, TrapReg_t reg) const
784 : {
785 : // print the content of the data memory as datx
786 :
787 0 : PrintMemDatx(os, reg, 0, 0, 127);
788 0 : }
789 :
790 :
791 : void AliTRDtrapConfig::PrintMemDatx(ostream &os, TrapReg_t reg, Int_t det, Int_t rob, Int_t mcm) const
792 : {
793 : // print the content of the data memory as datx
794 :
795 0 : if(reg>= kLastReg) {
796 0 : AliError(Form("Invalid register %i!", reg));
797 0 : return;
798 : }
799 0 : PrintDatx(os, GetRegAddress(reg), GetTrapReg(reg, det, rob, mcm), rob, mcm);
800 0 : }
801 :
802 :
803 : void AliTRDtrapConfig::PrintDatx(ostream &os, UInt_t addr, UInt_t data, Int_t rob, Int_t mcm) const
804 : {
805 : // print the value at the given address as datx
806 :
807 0 : os << std::setw(5) << 10
808 0 : << std::setw(8) << addr
809 0 : << std::setw(12) << data;
810 0 : if(mcm==127)
811 0 : os << std::setw(8) << 127;
812 : else
813 0 : os << std::setw(8) << AliTRDfeeParam::AliToExtAli(rob, mcm);
814 :
815 0 : os << std::endl;
816 0 : }
817 :
818 :
819 : void AliTRDtrapConfig::PrintVerify(ostream &os, Int_t det, Int_t rob, Int_t mcm) const
820 : {
821 : // print verification file in datx format
822 :
823 0 : for (Int_t iReg = 0; iReg < kLastReg; ++iReg) {
824 0 : os << std::setw(5) << 9
825 0 : << std::setw(8) << GetRegAddress((TrapReg_t) iReg)
826 0 : << std::setw(12) << GetTrapReg((TrapReg_t) iReg, det, rob, mcm)
827 0 : << std::setw(8) << AliTRDfeeParam::AliToExtAli(rob, mcm)
828 0 : << std::endl;
829 : }
830 :
831 0 : for (Int_t iWord = 0; iWord < fgkDmemWords; ++iWord) {
832 0 : if (GetDmemUnsigned(fgkDmemStartAddress + iWord, det, rob, mcm) == 0)
833 : continue;
834 0 : os << std::setw(5) << 9
835 0 : << std::setw(8) << fgkDmemStartAddress + iWord
836 0 : << std::setw(12) << GetDmemUnsigned(fgkDmemStartAddress + iWord, det, rob, mcm)
837 0 : << std::setw(8) << AliTRDfeeParam::AliToExtAli(rob, mcm)
838 0 : << std::endl;
839 0 : }
840 0 : }
841 :
842 : AliTRDtrapConfig::AliTRDtrapValue::AliTRDtrapValue() :
843 88938 : TObject(),
844 88938 : fAllocMode(kAllocGlobal),
845 88938 : fSize(1),
846 177876 : fData(new UInt_t[1]),
847 177876 : fValid(new Bool_t[1])
848 266814 : {
849 88938 : fData[0] = 0;
850 88938 : fValid[0] = kTRUE;
851 88938 : }
852 :
853 : AliTRDtrapConfig::AliTRDtrapValue::~AliTRDtrapValue()
854 2916 : {
855 2915 : delete [] fData;
856 2915 : delete [] fValid;
857 1458 : }
858 :
859 : Bool_t AliTRDtrapConfig::AliTRDtrapValue::Allocate(Alloc_t alloc)
860 : {
861 : // allocate memory for the specified granularity
862 :
863 3465 : delete [] fData;
864 2310 : delete [] fValid;
865 :
866 1155 : fAllocMode = alloc;
867 1155 : fSize = fgkSize[fAllocMode];
868 :
869 1155 : if (fSize > 0) {
870 1154 : fData = new UInt_t[fSize];
871 1154 : fValid = new Bool_t[fSize];
872 1294240 : for (Int_t i = 0; i < fSize; ++i) {
873 645966 : fData[i] = 0;
874 645966 : fValid[i] = kFALSE;
875 : }
876 1154 : }
877 : else {
878 1 : fData = 0x0;
879 1 : fValid = 0x0;
880 : }
881 :
882 1155 : return kTRUE;
883 : }
884 :
885 :
886 : Int_t AliTRDtrapConfig::AliTRDtrapValue::GetIdx(Int_t det, Int_t rob, Int_t mcm) const
887 : {
888 : // return Idx to access the data for the given position
889 :
890 : Int_t idx = -1;
891 :
892 421736714 : switch (fAllocMode) {
893 : case kAllocNone:
894 : idx = -1;
895 0 : break;
896 : case kAllocGlobal:
897 : idx = 0;
898 198142709 : break;
899 : case kAllocByDetector:
900 : idx = det;
901 3708 : break;
902 : case kAllocByHC:
903 0 : idx = det + (rob % 2);
904 0 : break;
905 : case kAllocByMCM:
906 119317 : idx = 18*8*det + 18*rob + mcm;
907 119317 : break;
908 : case kAllocByLayer:
909 10038330 : idx = det % 6;
910 10038330 : break;
911 : case kAllocByMCMinSM:
912 2564293 : idx = 18*8*(det%30) + 18*rob + mcm;
913 2564293 : break;
914 : default:
915 : idx = -1;
916 0 : AliError("Invalid allocation mode");
917 0 : }
918 210868357 : if (idx < fSize) {
919 210868357 : return idx;
920 : }
921 : else {
922 0 : AliError(Form("Index too large %i (size %i) for %s", idx, fSize, this->GetName()));
923 0 : return -1;
924 : }
925 210868357 : }
926 :
927 :
928 : Bool_t AliTRDtrapConfig::AliTRDtrapValue::SetData(UInt_t value)
929 : {
930 : // set the given value everywhere
931 :
932 132370 : for (Int_t i = 0; i < fSize; ++i) {
933 26474 : fData[i] = value;
934 26474 : fValid[i] = kFALSE;
935 : }
936 :
937 26474 : return kTRUE;
938 : }
939 :
940 :
941 : Bool_t AliTRDtrapConfig::AliTRDtrapValue::SetData(UInt_t value, Int_t det)
942 : {
943 : // set the data for a given detector
944 :
945 213840 : Int_t idx = GetIdx(det, 0, 0);
946 :
947 213840 : if (idx >= 0) {
948 : // short cut for detector-wise allocation
949 213840 : if (fAllocMode == kAllocByDetector) {
950 0 : if (fValid[idx] && (fData[idx] != value)) {
951 0 : AliDebug(1, Form("Overwriting previous value %i of %s with %i for %i!",
952 : fData[idx], this->GetName(), value, det));
953 : }
954 0 : fData[idx] = value;
955 0 : fValid[idx] = kTRUE;
956 0 : return kTRUE;
957 : }
958 : else {
959 1924560 : for (Int_t rob = 0; rob < 8; ++rob) {
960 32503680 : for (Int_t mcm = 0; mcm < 18; ++mcm) {
961 15396480 : idx = GetIdx(det, rob, mcm);
962 30714363 : if (fValid[idx] && (fData[idx] != value)) {
963 0 : AliDebug(1, Form("Overwriting previous value %i of %s with %i for %i %i:%02i!",
964 : fData[idx], this->GetName(), value, det, rob, mcm));
965 : }
966 15396480 : fData[idx] = value;
967 15396480 : fValid[idx] = kTRUE;
968 : }
969 : }
970 106920 : return kTRUE;
971 : }
972 : }
973 :
974 0 : if (fAllocMode == kAllocNone) {
975 : // assume nobody cares
976 0 : return kTRUE;
977 : }
978 0 : return kFALSE;
979 106920 : }
980 :
981 : Bool_t AliTRDtrapConfig::AliTRDtrapValue::SetData(UInt_t value, Int_t det, Int_t rob, Int_t mcm)
982 : {
983 : // set data for an individual MCM
984 :
985 5126112 : Int_t idx = GetIdx(det, rob, mcm);
986 :
987 2563056 : if (idx >= 0) {
988 4983300 : if (fValid[idx] && (fData[idx] != value)) {
989 0 : AliDebug(1, Form("Overwriting previous value %i of %s with %i for %i %i:%02i (idx: %i)!",
990 : fData[idx], this->GetName(), value, det, rob, mcm, idx));
991 : }
992 2563056 : fData[idx] = value;
993 2563056 : fValid[idx] = kTRUE;
994 2563056 : return kTRUE;
995 : }
996 0 : else if (fAllocMode == kAllocNone) {
997 0 : return kTRUE;
998 : }
999 : else {
1000 0 : AliError(Form("setting failed"));
1001 0 : return kFALSE;
1002 : }
1003 2563056 : }
1004 :
1005 : UInt_t AliTRDtrapConfig::AliTRDtrapValue::GetData(Int_t det, Int_t rob, Int_t mcm) const
1006 : {
1007 : // read data for the given MCM
1008 :
1009 385603802 : Int_t idx = GetIdx(det, rob, mcm);
1010 192801901 : if (idx >= 0) {
1011 192801901 : if (!fValid[idx])
1012 3623514 : AliDebug(1,Form("reading from unwritten address: %s at idx %i: %i", this->GetName(), idx, fValid[idx]));
1013 192801901 : return fData[idx];
1014 : }
1015 : else {
1016 0 : AliError("read from invalid address");
1017 0 : return 0;
1018 : }
1019 192801901 : }
1020 :
1021 : AliTRDtrapConfig::AliTRDtrapRegister::AliTRDtrapRegister() :
1022 26474 : AliTRDtrapValue(),
1023 26474 : fName("invalid"),
1024 26474 : fAddr(0),
1025 26474 : fNbits(0),
1026 26474 : fResetValue(0)
1027 132370 : {
1028 : // default constructor
1029 :
1030 52948 : }
1031 :
1032 : AliTRDtrapConfig::AliTRDtrapRegister::~AliTRDtrapRegister()
1033 1736 : {
1034 : // destructor
1035 :
1036 868 : }
1037 :
1038 : void AliTRDtrapConfig::AliTRDtrapRegister::Init(const char* name, Int_t addr, Int_t nBits, Int_t resetValue)
1039 : {
1040 : // init the TRAP register
1041 :
1042 52948 : if (fAddr == 0) {
1043 26474 : fName = name;
1044 26474 : fAddr = addr;
1045 26474 : fNbits = nBits;
1046 26474 : fResetValue = resetValue;
1047 26474 : }
1048 : else
1049 0 : AliFatal("Re-initialising an existing TRAP register");
1050 26474 : }
1051 :
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